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author | Matteo Bernardini | 2019-08-18 09:39:52 +0200 |
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committer | Matteo Bernardini | 2019-08-18 09:39:52 +0200 |
commit | 6b4dcc675fdfd2b11080d203d1807cbfab2ce79b (patch) | |
tree | 90a301b976acf4d029db86f7aec5dbb14034eae9 /development/gcc5/patches/0007-x86-Add-mindirect-branch-register-doc.diff | |
parent | d04189e642ca17186cb9b2b5899fa9c12aceb782 (diff) | |
download | slackbuilds-6b4dcc675fdfd2b11080d203d1807cbfab2ce79b.tar.gz |
20190818.1 global branch merge.current-20190818.1
Signed-off-by: Matteo Bernardini <ponce@slackbuilds.org>
Diffstat (limited to 'development/gcc5/patches/0007-x86-Add-mindirect-branch-register-doc.diff')
-rw-r--r-- | development/gcc5/patches/0007-x86-Add-mindirect-branch-register-doc.diff | 231 |
1 files changed, 231 insertions, 0 deletions
diff --git a/development/gcc5/patches/0007-x86-Add-mindirect-branch-register-doc.diff b/development/gcc5/patches/0007-x86-Add-mindirect-branch-register-doc.diff new file mode 100644 index 0000000000..9780bfc918 --- /dev/null +++ b/development/gcc5/patches/0007-x86-Add-mindirect-branch-register-doc.diff @@ -0,0 +1,231 @@ +From 86118fbdbafe6af54b2da467e1073c49e1742116 Mon Sep 17 00:00:00 2001 +From: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4> +Date: Tue, 16 Jan 2018 11:17:49 +0000 +Subject: [PATCH 7/9] x86: Add -mindirect-branch-register (documentation) + +Add -mindirect-branch-register to force indirect branch via register. +This is implemented by disabling patterns of indirect branch via memory, +similar to TARGET_X32. + +-mindirect-branch= and -mfunction-return= tests are updated with +-mno-indirect-branch-register to avoid false test failures when +-mindirect-branch-register is added to RUNTESTFLAGS for "make check". + +gcc/ + + Backport from mainline + 2018-01-14 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/constraints.md (Bs): Disallow memory operand for + -mindirect-branch-register. + (Bw): Likewise. + * config/i386/predicates.md (indirect_branch_operand): Likewise. + (GOT_memory_operand): Likewise. + (call_insn_operand): Likewise. + (sibcall_insn_operand): Likewise. + (GOT32_symbol_operand): Likewise. + * config/i386/i386.md (indirect_jump): Call convert_memory_address + for -mindirect-branch-register. + (tablejump): Likewise. + (*sibcall_memory): Likewise. + (*sibcall_value_memory): Likewise. + Disallow peepholes of indirect call and jump via memory for + -mindirect-branch-register. + (*call_pop): Replace m with Bw. + (*call_value_pop): Likewise. + (*sibcall_pop_memory): Replace m with Bs. + * config/i386/i386.opt (mindirect-branch-register): New option. + * doc/invoke.texi: Document -mindirect-branch-register option. + +gcc/testsuite/ + + Backport from mainline + 2018-01-14 H.J. Lu <hongjiu.lu@intel.com> + + * gcc.target/i386/indirect-thunk-1.c (dg-options): Add + -mno-indirect-branch-register. + * gcc.target/i386/indirect-thunk-2.c: Likewise. + * gcc.target/i386/indirect-thunk-3.c: Likewise. + * gcc.target/i386/indirect-thunk-4.c: Likewise. + * gcc.target/i386/indirect-thunk-5.c: Likewise. + * gcc.target/i386/indirect-thunk-6.c: Likewise. + * gcc.target/i386/indirect-thunk-7.c: Likewise. + * gcc.target/i386/indirect-thunk-attr-1.c: Likewise. + * gcc.target/i386/indirect-thunk-attr-2.c: Likewise. + * gcc.target/i386/indirect-thunk-attr-3.c: Likewise. + * gcc.target/i386/indirect-thunk-attr-4.c: Likewise. + * gcc.target/i386/indirect-thunk-attr-5.c: Likewise. + * gcc.target/i386/indirect-thunk-attr-6.c: Likewise. + * gcc.target/i386/indirect-thunk-attr-7.c: Likewise. + * gcc.target/i386/indirect-thunk-bnd-1.c: Likewise. + * gcc.target/i386/indirect-thunk-bnd-2.c: Likewise. + * gcc.target/i386/indirect-thunk-bnd-3.c: Likewise. + * gcc.target/i386/indirect-thunk-bnd-4.c: Likewise. + * gcc.target/i386/indirect-thunk-extern-1.c: Likewise. + * gcc.target/i386/indirect-thunk-extern-2.c: Likewise. + * gcc.target/i386/indirect-thunk-extern-3.c: Likewise. + * gcc.target/i386/indirect-thunk-extern-4.c: Likewise. + * gcc.target/i386/indirect-thunk-extern-5.c: Likewise. + * gcc.target/i386/indirect-thunk-extern-6.c: Likewise. + * gcc.target/i386/indirect-thunk-extern-7.c: Likewise. + * gcc.target/i386/indirect-thunk-inline-1.c: Likewise. + * gcc.target/i386/indirect-thunk-inline-2.c: Likewise. + * gcc.target/i386/indirect-thunk-inline-3.c: Likewise. + * gcc.target/i386/indirect-thunk-inline-4.c: Likewise. + * gcc.target/i386/indirect-thunk-inline-5.c: Likewise. + * gcc.target/i386/indirect-thunk-inline-6.c: Likewise. + * gcc.target/i386/indirect-thunk-inline-7.c: Likewise. + * gcc.target/i386/ret-thunk-10.c: Likewise. + * gcc.target/i386/ret-thunk-11.c: Likewise. + * gcc.target/i386/ret-thunk-12.c: Likewise. + * gcc.target/i386/ret-thunk-13.c: Likewise. + * gcc.target/i386/ret-thunk-14.c: Likewise. + * gcc.target/i386/ret-thunk-15.c: Likewise. + * gcc.target/i386/ret-thunk-9.c: Likewise. + * gcc.target/i386/indirect-thunk-register-1.c: New test. + * gcc.target/i386/indirect-thunk-register-2.c: Likewise. + * gcc.target/i386/indirect-thunk-register-3.c: Likewise. + +i386: Rename to ix86_indirect_branch_register + +Rename the variable for -mindirect-branch-register to +ix86_indirect_branch_register to match the command-line option name. + + Backport from mainline + 2018-01-15 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/constraints.md (Bs): Replace + ix86_indirect_branch_thunk_register with + ix86_indirect_branch_register. + (Bw): Likewise. + * config/i386/i386.md (indirect_jump): Likewise. + (tablejump): Likewise. + (*sibcall_memory): Likewise. + (*sibcall_value_memory): Likewise. + Peepholes of indirect call and jump via memory: Likewise. + * config/i386/i386.opt: Likewise. + * config/i386/predicates.md (indirect_branch_operand): Likewise. + (GOT_memory_operand): Likewise. + (call_insn_operand): Likewise. + (sibcall_insn_operand): Likewise. + (GOT32_symbol_operand): Likewise. + +x86: Rewrite ix86_indirect_branch_register logic + +Rewrite ix86_indirect_branch_register logic with + +(and (not (match_test "ix86_indirect_branch_register")) + (original condition before r256662)) + + Backport from mainline + 2018-01-15 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/predicates.md (constant_call_address_operand): + Rewrite ix86_indirect_branch_register logic. + (sibcall_insn_operand): Likewise. + +Don't check ix86_indirect_branch_register for GOT operand + +Since GOT_memory_operand and GOT32_symbol_operand are simple pattern +matches, don't check ix86_indirect_branch_register here. If needed, +-mindirect-branch= will convert indirect branch via GOT slot to a call +and return thunk. + + Backport from mainline + 2018-01-15 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/constraints.md (Bs): Update + ix86_indirect_branch_register check. Don't check + ix86_indirect_branch_register with GOT_memory_operand. + (Bw): Likewise. + * config/i386/predicates.md (GOT_memory_operand): Don't check + ix86_indirect_branch_register here. + (GOT32_symbol_operand): Likewise. + +i386: Rewrite indirect_branch_operand logic + + Backport from mainline + 2018-01-15 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/predicates.md (indirect_branch_operand): Rewrite + ix86_indirect_branch_register logic. + + +git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-7-branch@256735 138bc75d-0d04-0410-961f-82ee72b054a4 + +[Ubuntu note: Dropped indirect-thunk-5.c, indirect-thunk-6.c, + indirect-thunk-bnd-3.c, indirect-thunk-bnd-4.c, + indirect-thunk-extern-5.c, indirect-thunk-extern-6.c, + indirect-thunk-inline-5.c, and indirect-thunk-inline-6.c tests due + to gcc 5.4 and earlier not supporting the -fno-plt option. + --sbeattie,] +--- + src/gcc/config/i386/constraints.md | 6 + + src/gcc/config/i386/i386.md | 34 ++++++---- + src/gcc/config/i386/i386.opt | 4 + + src/gcc/config/i386/predicates.md | 9 +- + src/gcc/doc/invoke.texi | 7 +- + src/gcc/testsuite/gcc.target/i386/indirect-thunk-1.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-2.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-3.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-4.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-7.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-1.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-2.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-3.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-4.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-5.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-6.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-7.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-bnd-1.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-bnd-2.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-1.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-2.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-3.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-4.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-7.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-1.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-2.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-3.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-4.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-7.c | 2 + src/gcc/testsuite/gcc.target/i386/indirect-thunk-register-1.c | 22 ++++++ + src/gcc/testsuite/gcc.target/i386/indirect-thunk-register-2.c | 20 +++++ + src/gcc/testsuite/gcc.target/i386/indirect-thunk-register-3.c | 19 +++++ + src/gcc/testsuite/gcc.target/i386/ret-thunk-10.c | 2 + src/gcc/testsuite/gcc.target/i386/ret-thunk-11.c | 2 + src/gcc/testsuite/gcc.target/i386/ret-thunk-12.c | 2 + src/gcc/testsuite/gcc.target/i386/ret-thunk-13.c | 2 + src/gcc/testsuite/gcc.target/i386/ret-thunk-14.c | 2 + src/gcc/testsuite/gcc.target/i386/ret-thunk-15.c | 2 + src/gcc/testsuite/gcc.target/i386/ret-thunk-9.c | 2 + 39 files changed, 134 insertions(+), 49 deletions(-) + create mode 100644 gcc/testsuite/gcc.target/i386/indirect-thunk-register-1.c + create mode 100644 gcc/testsuite/gcc.target/i386/indirect-thunk-register-2.c + create mode 100644 gcc/testsuite/gcc.target/i386/indirect-thunk-register-3.c + +Index: b/src/gcc/doc/invoke.texi +=================================================================== +--- a/src/gcc/doc/invoke.texi ++++ b/src/gcc/doc/invoke.texi +@@ -1091,7 +1091,8 @@ See RS/6000 and PowerPC Options. + -msse2avx -mfentry -mrecord-mcount -mnop-mcount -m8bit-idiv @gol + -mavx256-split-unaligned-load -mavx256-split-unaligned-store @gol + -malign-data=@var{type} -mstack-protector-guard=@var{guard} @gol +--mindirect-branch=@var{choice} -mfunction-return=@var{choice}} ++-mindirect-branch=@var{choice} -mfunction-return=@var{choice} @gol ++-mindirect-branch-register} + + @emph{x86 Windows Options} + @gccoptlist{-mconsole -mcygwin -mno-cygwin -mdll @gol +@@ -24040,6 +24041,10 @@ object file. You can control this behav + using the function attribute @code{function_return}. + @xref{Function Attributes}. + ++@item -mindirect-branch-register ++@opindex -mindirect-branch-register ++Force indirect call and jump via register. ++ + @end table + + @c man end |